|Home > Overview of the Armv8 Architecture > About the Arm architecture|
The Arm® architecture is a load-store architecture. The addressing range depends on whether you are using the 32-bit or the 64-bit architecture.
Arm processors are typical of RISC processors in that only load and store instructions can access memory. Data processing instructions operate on register contents only.
Armv8 is the next major architectural update after Armv7. It introduces a 64-bit architecture, but maintains compatibility with existing 32-bit architectures. It uses two execution states:
In AArch32 state, code has access to 32-bit general purpose registers.
Code executing in AArch32 state can only use the A32 and T32 instruction sets. This state is broadly compatible with the Armv7‑A architecture.
In AArch64 state, code has access to 64-bit general purpose registers. The AArch64 state exists only in the Armv8 architecture.
Code executing in AArch64 state can only use the A64 instruction set.
In the AArch32 execution state, there are the following instruction set states: