20.167 SMOV (vector)

Signed Move vector element to general-purpose register.

Syntax

SMOV Wd, Vn.Ts[index] ; 32-bit

SMOV Xd, Vn.Ts[index] ; 64-bit

Where:

Wd
Is the 32-bit name of the general-purpose destination register.
Ts

Is an element size specifier:

32-bit
Can be one of B or H.
64-bit
Can be one of B, H or S.
index
Is the element index, in the range shown in Usage.
Xd
Is the 64-bit name of the general-purpose destination register.
Vn
Is the name of the SIMD and FP source register.

Usage

Signed Move vector element to general-purpose register. This instruction reads the signed integer from the source SIMD and FP register, sign-extends it to form a 32-bit or 64-bit value, and writes the result to destination general-purpose register.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

The following tables show valid specifier combinations:

Table 20-53 SMOV (32-bit) specifier combinations

Ts index
B 0 to 15
H 0 to 7

Table 20-54 SMOV (64-bit) specifier combinations

Ts index
B 0 to 15
H 0 to 7
S 0 to 3
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