|Home > Floating-point Programming > Extension register bank mapping in AArch64 state|
The extension register bank is a collection of registers that can be accessed as 16-bit, 32-bit, or 64-bit. It is distinct from the Arm® core register bank.
The following figure shows the views of the extension register bank, and the overlap between the different size registers.
The mapping between the registers is as follows:
S<n>maps to the least significant half of
H<n>maps to the least significant half of
For example, you can access the least significant half of register
D7 by referring to