10.3 Extension register bank mapping in AArch64 state

The extension register bank is a collection of registers that can be accessed as 16-bit, 32-bit, or 64-bit. It is distinct from the Arm® core register bank.

The following figure shows the views of the extension register bank, and the overlap between the different size registers.

Figure 10-2 Extension register bank for floating-point in AArch64 state
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The mapping between the registers is as follows:

  • S<n> maps to the least significant half of D<n>
  • H<n> maps to the least significant half of S<n>

For example, you can access the least significant half of register D7 by referring to S7.

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