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A Type 1 image consists of a single load region in the load view and three default execution regions, ER_RO, ER_RW, ER_ZI. These are placed contiguously in the memory map. An additional ER_XO execution region is created only if any input section is execute-only.
This approach is suitable for systems that load programs into RAM, for example, an OS bootloader or a desktop system. The following figure shows the load and execution view for a Type 1 image without execute-only (XO) code:
Use the following command for images of this type:
armlink --cpu=8-A.32 --ro_base=0x8000
is the default address, so you do not have to specify
--ro_basefor the example.
The single load region consists of the RO and RW output sections, placed consecutively. The RO and RW execution regions are both root regions. The ZI output section does not exist at load time. It is created before execution, using the output section description in the image file.
The three execution regions containing the RO, RW, and ZI output sections are arranged contiguously. The execution addresses of the RO and RW regions are the same as their load addresses, so nothing has to be moved from its load address to its execution address. However, the ZI execution region that contains the ZI output section is created at run-time.
Use armlink option
--ro_base= to specify the load and execution address of the region
containing the RO output. The default address is
--zi_base command-line option to specify the base address of a ZI
For images that contain XO sections, the XO output section is placed at the
address that is specified by
--ro_base. The RO and RW output sections are placed consecutively and
immediately after the XO section.
For images that contain XO sections, the XO execution region is placed at
the address that is specified by
--ro_base. The RO, RW, and ZI execution regions are placed contiguously and
immediately after the XO execution region.