Fast Models User Guide

Version 9.0


Table of Contents

Preface
About this book
Using this book
Glossary
Typographic conventions
Feedback
Other information
1 Introduction to Fast Models
1.1 About Fast Models
1.2 Installation and uninstallation
1.2.1 Software requirements for Fast Models
1.2.2 Installation of Fast Models
1.2.3 Uninstallation of Fast Models
1.2.4 Setting-up a network connection and configuring the networking environment for Linux
1.2.5 Setting up a TAP network connection and configuring the networking environment for Microsoft Windows
1.2.6 Networking gateways
1.3 Fast Models Design
1.3.1 Fast Models design flow
1.3.2 Project files
1.3.3 Repository files
1.3.4 File processing order
1.3.5 Hierarchical systems
2 Getting Started with Fast Models
2.1 About Getting Started with Fast Models
2.2 System Canvas
2.2.1 Starting System Canvas
2.2.2 Setting up the Fast Model Portfolio
2.3 Creating a sample system
2.4 Add and configure components
2.4.1 Adding the ARM processor
2.4.2 Naming components
2.4.3 Resizing components
2.4.4 Hiding ports
2.4.5 Moving ports
2.4.6 Adding components
2.4.7 Using port arrays
2.5 Connecting components
2.6 Fast Models files
2.6.1 LISA source
2.6.2 System Canvas file
2.6.3 Fast Models project file
2.7 View project properties and settings
2.7.1 Viewing the project settings
2.7.2 Specifying the Project Active Configuration
2.7.3 Viewing the top component properties
2.8 Changing the address mapping
2.9 Building the system
2.10 Debugging the system
2.11 Build an ISIM target
2.11.1 Building ISIM targets
2.11.2 Overloading the main() function in the target
2.11.3 Command line switches for the executable target
3 Debugging
3.1 About debugging
3.2 Debugging from System Canvas
3.2.1 Debugging with Model Debugger
3.2.2 Configuring Model Debugger
3.3 Batch mode debugging
3.3.1 Direct execution
3.3.2 Debug server
3.4 Using other debuggers to debug LISA source
3.4.1 Generating a debuggable model
3.4.2 Debugging with GDB at the source level
3.4.3 Debugging with Microsoft Visual Studio at the source level
3.4.4 Debugging with Microsoft Visual Studio at the host level
4 System Canvas Reference
4.1 Launching System Canvas
4.2 Overview of System Canvas
4.2.1 Application window
4.2.2 Menu bar
4.2.3 Toolbar
4.2.4 Workspace window
4.2.5 Component window
4.2.6 Output window
4.3 Add Existing Files and Add New File dialogs (Component window)
4.3.1 Displaying the Add Existing Files and Add New File dialogs (Component window)
4.3.2 Using the Add Existing Files and Add New File dialogs (Component window)
4.3.3 Using environment variables in filepaths
4.3.4 Assigning platforms and compilers for libraries
4.4 Add Files dialog (Project menu)
4.5 Add Connection dialog
4.6 Component Instance Properties dialog
4.7 Component Model Properties dialog for the system
4.8 Component Properties dialog for a library component
4.9 Connection Properties dialog
4.10 Edit Connection dialog
4.11 File/Path Properties dialog
4.12 Find and Replace dialogs
4.13 Label Properties dialog
4.14 New File dialog (File menu)
4.15 New project dialogs
4.15.1 New Project dialog
4.15.2 Select Top Component LISA File dialog
4.16 Open File dialog
4.17 Port Properties dialog
4.18 Preferences dialog
4.18.1 Preferences - Appearance group
4.18.2 Preferences - Applications group
4.18.3 Preferences - External Tools group
4.18.4 Preferences - Fonts group
4.18.5 Preferences - Default Model Repository group
4.18.6 Preferences - Suppressed messages group
4.19 Project Settings dialog
4.19.1 Project top-level settings
4.19.2 Parameter category panel
4.19.3 Alphabetical list of project parameter IDs
4.19.4 Project file contents
4.20 Protocol Properties dialog
4.21 Run dialog
4.22 Self Port dialog
5 SystemC Export with Multiple Instantiation
5.1 About SystemC Export with Multiple Instantiation
5.2 Building a SystemC subsystem with System Canvas
5.2.1 Installing SystemC and TLM files
5.2.2 License implications
5.2.3 Building the EVS
5.2.4 Header files and libraries for Linux export
5.2.5 Header files and libraries for Microsoft Windows export
5.3 Adding a SystemC subsystem to a SystemC system
5.4 SystemC Export generated ports
5.4.1 About SystemC Export generated ports
5.4.2 Protocol definition
5.4.3 Properties for TLM 1.0 based protocols
5.4.4 Properties for TLM 2.0 based protocols
5.5 Example systems
5.5.1 About example systems
5.5.2 Building the examples
5.5.3 Ways to run the examples
5.5.4 Running the examples with debug support
5.5.5 Instantiating a big.LITTLE example
5.5.6 Instantiating a CustomScheduler example
5.5.7 Instantiating a Dhrystone example
5.5.8 Instantiating a DMA example
5.5.9 Instantiating a DMADhrystone example
5.5.10 Instantiating a DualDhrystone example
5.5.11 Instantiating a GlobalInterface example
5.5.12 Instantiating a LinuxBoot example
5.6 SystemC Export API
5.6.1 SystemC Export header file
5.6.2 scx::scx_initialize
5.6.3 scx::scx_load_application
5.6.4 scx::scx_load_application_all
5.6.5 scx::scx_load_data
5.6.6 scx::scx_load_data_all
5.6.7 scx::scx_set_parameter
5.6.8 scx::scx_get_parameter
5.6.9 scx::scx_get_parameter_list
5.6.10 scx::scx_parse_and_configure
5.6.11 scx::scx_start_cadi_server
5.6.12 scx::scx_enable_cadi_log
5.6.13 scx::scx_prefix_appli_output
5.6.14 scx::scx_print_port_number
5.6.15 scx::scx_print_statistics
5.6.16 scx::scx_load_trace_plugin
5.6.17 scx::scx_load_plugin
5.6.18 scx::scx_get_global_interface
5.6.19 scx::scx_evs_base
5.6.20 scx::load_application
5.6.21 scx::load_data
5.6.22 scx::set_parameter
5.6.23 scx::get_parameter
5.6.24 scx::get_parameter_list
5.6.25 scx::constructor
5.6.26 scx::destructor
5.6.27 scx::before_end_of_elaboration
5.6.28 scx::end_of_elaboration
5.6.29 scx::start_of_simulation
5.6.30 scx::end_of_simulation
5.6.31 scx::scx_simcallback_if
5.6.32 scx::notify_running
5.6.33 scx::notify_stopped
5.6.34 scx::notify_idle
5.6.35 scx::simcallback_if destructor
5.6.36 scx::scx_simcontrol_if
5.6.37 scx::get_scheduler
5.6.38 scx::get_report_handler
5.6.39 scx::run
5.6.40 scx::stop
5.6.41 scx::is_running
5.6.42 scx::stop_acknowledge
5.6.43 scx::process_idle
5.6.44 scx::shutdown
5.6.45 scx::add_callback
5.6.46 scx::remove_callback
5.6.47 scx::destructor
5.6.48 scx::scx_get_default_simcontrol
5.6.49 scx::scx_report_handler_if
5.6.50 scx::scx_get_default_report_handler
5.6.51 scx::scx_get_curr_report_handler
5.6.52 scx::scx_sync
5.7 Scheduler API
5.7.1 About the Scheduler API
5.7.2 Scheduler API - use cases and implementation
5.7.3 Class sg::SchedulerInterfaceForComponents
5.7.4 Class sg::SchedulerThread
5.7.5 Class sg::SchedulerRunnable
5.7.6 Class sg::QuantumKeeper
5.7.7 Class sg::ThreadSignal
5.7.8 Class sg::Timer
5.7.9 Class sg::TimerCallback
5.7.10 Class sg::FrequencySource
5.7.11 Class sg::FrequencyObserver
5.7.12 Class sg::SchedulerObject
5.7.13 sg::scx_create_default_scheduler_mapping
5.7.14 Scheduler API - anticipated changes
5.8 SystemC Export limitations
5.8.1 SystemC Export limitation on re-entrancy
5.8.2 SystemC Export limitation on calling wait in the middle of a transaction
5.8.3 SystemC Export limitation on code translation support for external memory
5.8.4 SystemC Export limitation on Fast Models versions for MI platforms
6 Creating a New Component
6.1 Basic configuration
6.1.1 About the custom component
6.1.2 Create a new LISA file
6.1.3 Adding a resources section to a LISA file
6.2 Adding ports
6.3 Behavior section
6.3.1 About behaviors
6.3.2 Viewing the SerialData protocol
6.3.3 Adding a new behavior to a slave port
6.3.4 Declaring a master port
6.3.5 Special purpose behaviors
6.4 Using the SerialCharDoubler component in the system
A Building and Running the EB FVP Example System
A.1 Using System Canvas to build a platform model
A.1.1 Building an EB Fixed Virtual Platform
A.1.2 Packaging a system model for distribution
A.2 Connecting to a model
A.2.1 Using Model Shell to run a system model
A.2.2 Using Model Debugger to run a system model
A.2.3 Using RealView Debugger to run a system model
A.3 Running an application on the system model
A.3.1 About running an application on the system model
A.3.2 Running the brot application in Model Debugger
A.3.3 Running the brot application in RealView Debugger
A.3.4 Using the CLCD window
B Linux Dependencies
B.1 Dependencies for Red Hat Enterprise Linux
B.1.1 About Red Hat Enterprise Linux dependencies
B.1.2 Dependencies for Red Hat Enterprise Linux 5
B.1.3 Dependencies for Red Hat Enterprise Linux 6
B.2 Dependencies for Ubuntu 12.04 LTS
C Building System Models in Batch Mode
C.1 About System Generator
C.2 SimGen command-line options
C.3 Decreasing compilation time
C.3.1 num-comps-file and compilation time
C.3.2 num-comps-file, num-build-cpus, and compilation time
C.4 Setting command-line options from System Canvas

List of Figures

1-1 Fast Models design flow
1-2 Organization of project directories and files on Microsoft Windows
1-3 Block diagram of top-level VE model in System Canvas
1-4 Contents of VE motherboard component
1-5 Self port detail
1-6 Clock divider component external ports
2-1 System Canvas at startup
2-2 Preferences dialog, Setup Default Model Repository
2-3 Add Model Repository File dialog
2-4 New project dialog
2-5 Select Top Component LISA File dialog
2-6 ARMCortexA8CT processor component in the Block Diagram window
2-7 Rename component
2-8 Processor component after changes
2-9 Port context menu
2-10 Example system with added components
2-11 Connected components
2-12 Project settings for the example, showing the Compiler options panel
2-13 Select Top Component dialog showing available components
2-14 Viewing the address mapping from the Port Properties dialog
2-15 Edit Connection dialog
2-16 Edit address map for slave port
2-17 Build process output
2-18 Debug Simulation dialog
2-19 Configuring Model Parameters dialog
2-20 Select Targets dialog
2-21 Model Debugger Application Input window
2-22 Build Integrated Simulator target
2-23 Specifying user-defined main() option
3-1 Debug Simulation dialog
3-2 Configure Model Parameters dialog
3-3 Select Targets dialog
3-4 Load application for processor
3-5 Dual processor system running in Model Debugger with one processor running ARM embedded Linux, and the other running brot.axf
3-6 Model Debugger paths in the Preferences dialog
3-7 Direct execution use case
3-8 Debug server use case
4-1 Layout of System Canvas
4-2 Add Existing Files dialog
4-3 Add New File dialog
4-4 Add Files dialog
4-5 Add Connection dialog
4-6 Component Instance Properties dialog, General tab
4-7 Component Instance Properties dialog, Properties tab
4-8 Component Instance Properties dialog, Parameters tab
4-9 Component Instance Properties dialog, Ports tab
4-10 Component Instance Properties dialog, Methods tab
4-11 Component Model Properties dialog
4-12 Component Model Properties dialog, Properties tab
4-13 Component Model Properties dialog, Parameters tab
4-14 Add Component Parameter dialog
4-15 Component Model Properties dialog, Ports tab
4-16 Component Properties dialog for SerialCharDoubler
4-17 Component Properties dialog, Properties tab
4-18 Component Properties dialog, Parameters tab
4-19 Component Properties dialog, Ports tab
4-20 Component Properties dialog, Methods tab
4-21 Connection Properties dialog
4-22 Add/Edit Connection Mapping dialog
4-23 File/Path Properties dialog, General tab
4-24 File/Path Properties dialog, Build actions tab
4-25 Find dialog
4-26 Find and Replace dialog
4-27 Label Properties dialog
4-28 New File dialog
4-29 New Project dialog
4-30 Select Top Component LISA File dialog
4-31 Open File dialog
4-32 Port Properties dialog
4-33 Preferences dialog, Appearance group
4-34 Preferences dialog, Applications group
4-35 Preferences, Applications for Linux
4-36 Preferences dialog, External Tools group
4-37 Preferences dialog, Fonts group
4-38 Preferences dialog, Model Repository
4-39 Add Model Repository File
4-40 Preferences dialog, Suppressed Messages
4-41 Project Settings dialog
4-42 Project Settings dialog, Category View, top level
4-43 Project Settings dialog, Category View, Targets
4-44 Project Settings dialog, Category View, Debugging
4-45 Project Settings dialog, Category View, Simulation Generator
4-46 Project Settings dialog, Category View, Compiler
4-47 Project Settings dialog, Category View, Linker
4-48 Project Settings dialog, List View
4-49 Project Settings dialog, Tree View
4-50 Project Settings dialog, Category View top level
4-51 Protocol Properties dialog for SerialData
4-52 Run dialog
4-53 Self Port dialog
5-1 Port wrappers connect Fast Models and SystemC components
5-2 SGSignal component in System Canvas
6-1 Character doubler component
6-2 Self Port dialog
6-3 Select Protocol dialog
6-4 SerialCharDoubler inserted in dual processor system
6-5 Linux booting with SerialCharDoubler component
A-1 Model Debugger Connect remote dialog
A-2 Model Debugger Select Targets dialog
A-3 Configure Model Parameters dialog
A-4 CLCD window
A-5 Breakpoint in brot.c
A-6 CLCD window at startup
A-7 CLCD window alternative display

List of Tables

4-1 System Canvas command line optional parameters
4-2 Suffixes for parameter values
4-3 Component properties
4-4 Suffixes for parameter values
4-5 Configuration parameters in the Category View
4-6 Target parameters in the Category View
4-7 Debugging parameters in the Category View
4-8 Simulation Generator parameters in the Category View
4-9 Compiler parameters in the Category View
4-10 Linker parameters in the Category View tab
4-11 Full list of parameters shown in List View
6-1 Special-purpose behaviors
B-1 Dependencies for Red Hat Enterprise Linux 5
B-2 Dependencies for Red Hat Enterprise Linux 6
B-3 32-bit libraries for use on 64-bit versions of Red Hat Enterprise Linux 6
B-4 Dependencies for Ubuntu 12.04 LTS
C-1 SimGen command-line options

Release Information

Document History
Issue Date Confidentiality Change
A 31 May 2014 Confidential New document for v9.0 based on DUI0370R for v8.3.

Non-Confidential Proprietary Notice

This document is protected by copyright and other related rights and the practice or implementation of the information contained in this document may be protected by one or more patents or pending patent applications. No part of this document may be reproduced in any form by any means without the express prior written permission of ARM. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this document unless specifically stated.
Your access to the information in this document is conditional upon your acceptance that you will not use or permit others to use the information for the purposes of determining whether implementations infringe any third party patents.
THIS DOCUMENT IS PROVIDED “AS IS”. ARM PROVIDES NO REPRESENTATIONS AND NO WARRANTIES, EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, SATISFACTORY QUALITY, NON-INFRINGEMENT OR FITNESS FOR A PARTICULAR PURPOSE WITH RESPECT TO THE DOCUMENT. For the avoidance of doubt, ARM makes no representation with respect to, and has undertaken no analysis to identify or understand the scope and content of, third party patents, copyrights, trade secrets, or other rights.
This document may include technical inaccuracies or typographical errors.
TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT WILL ARM BE LIABLE FOR ANY DAMAGES, INCLUDING WITHOUT LIMITATION ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, ARISING OUT OF ANY USE OF THIS DOCUMENT, EVEN IF ARM HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
This document consists solely of commercial items. You shall be responsible for ensuring that any use, duplication or disclosure of this document complies fully with any relevant export laws and regulations to assure that this document or any portion thereof is not exported, directly or indirectly, in violation of such export laws. Use of the word “partner” in reference to ARM’s customers is not intended to create or refer to any partnership relationship with any other company. ARM may make changes to this document at any time and without notice.
If any of the provisions contained in these terms conflict with any of the provisions of any signed written agreement covering this document with ARM, then the signed written agreement prevails over and supersedes the conflicting provisions of these terms. This document may be translated into other languages for convenience, and you agree that if there is any conflict between the English version of this document and any translation, the terms of the English version of the Agreement shall prevail.
Copyright © [2014], ARM Limited or its affiliates. All rights reserved.
ARM Limited. Company 02557590 registered in England.
110 Fulbourn Road, Cambridge, England CB1 9NJ.
LES-PRE-20349

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.
Unrestricted Access is an ARM internal classification.

Product Status

The information in this document is Final, that is for a developed product.

Web Address

Non-ConfidentialPDF file icon PDF versionARM DUI0835A
Copyright © 2014 ARM. All rights reserved.