5.5.6 VE - differences in timing
Fixed Virtual Platforms (FVPs) allow software to run in a functionally accurate simulation. However, because of the balance of fast simulation speed and timing accuracy, in some situations the models might behave unexpectedly.
When code interacts with real world devices like timers and keyboards, data
arrives in the modeled device in real-world, or wall-clock, time. However, simulation time
can be running much faster than the wall clock. This difference means that a single keypress
might be interpreted as several repeated key presses, or a single mouse click incorrectly
becomes a double click.
The VE FVPs
provide the Rate Limit feature to match simulation time to wall-clock
time. Enabling the rate limit prevents the model from running faster than wall-clock time.
Enable it with either the Rate Limit button in the CLCD display, or
rate_limit-enable model instantiation parameter. This
precaution avoids issues with two clocks running at different rates. For interactive
applications, ARM recommends enabling the rate limit.