5.1 VE - about

The VE FVPs are software system models. They provide functionally accurate models for software execution.

ARM produces the Versatile Express (VE) hardware development platform. The Motherboard Express μAdvanced Technology Extended (ATX) V2M-P1 is the basis for an integrated software and hardware development system. This system is also based on the ARM® Symmetric MultiProcessor (SMP) system architecture.

The motherboard provides:

  • Peripherals for multimedia or networking environments.
  • Access to motherboard peripherals and functions through a static memory bus to simplify access from daughterboards.
  • High-performance PCI-Express slots for expansion cards.
  • Consistent memory maps with different processor daughterboards that simplify software development and porting.
  • Automatic detection and configuration of attached CoreTile Express and LogicTile Express daughterboards.
  • Automatic shutdown for over-temperature or power supply failure.
  • No system power-on for unconfigurable daughterboards.
  • Power sequencing of system.
  • Drag and drop file updating of configuration files.
  • Support of either a 12V power-supply unit or an external ATX power supply.
  • Support of FPGA and processor daughterboards to provide custom peripherals, early access to processor designs, or production test chips.

The VE FVPs are software system models. They contain:

  • Virtual implementations of a motherboard.
  • Single daughterboards each containing an ARM processor.
  • Associated interconnections.

Note:

ARM bases the models on the VE platform memory map, but does not intend them to be accurate representations of a specific VE hardware revision. The VE FVPs support selected peripherals. The models are sufficiently complete and accurate to boot the same operating system images as the VE hardware.

VE FVPs provide functionally accurate models for software execution. However, the models sacrifice timing accuracy to increase simulation speed. Key deviations from actual hardware are:

  • Approximate timing.
  • Simplified buses.
  • No implementations for processor caches and the related write buffers.

ARM supplies these VE FVPs:

  • FVP_VE Cortex-A5x1, 2, 4.
  • FVP_VE Cortex-A7x1, 2, 3, 4.
  • FVP_VE Cortex-A9x1, 2, 4.
  • FVP_VE Cortex-A12x1, 2, 3, 4.
  • FVP_VE Cortex-A15x1, 2, 4.
  • FVP_VE Cortex-A15x1, 4-A7x1, 4.
  • FVP_VE Cortex-A15x1, 4-A7x1, 4-MMU400-DMA330
  • FVP_VE Cortex-A15x1-A7x1-MMU500-DMA330
  • FVP_VE Cortex-A15x1-DP500
  • FVP_VE Cortex-A15x1-DP550
  • FVP_VE Cortex-A17x1, 2, 3, 4.
  • FVP_VE Cortex-A17x1, 4-A7x1, 4.
  • FVP_VE Cortex-R4.
  • FVP_VE Cortex-R5x1, 2
  • FVP_VE Cortex-R7x1, 2
  • FVP_VE Cortex-R8x1, 2, 3, 4.
Figure 5-1 Block diagram of top-level VE model
Block diagram of top-level VE model


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