4.2.1 MPS2 - memory map for models without the ARMv8-M additions

This section describes the MPS2 memory map for older cores, without the ARMv8-M additions.

For standard ARM peripherals, see the TRM for that device.


  • A bus error is generated for accesses to memory areas not shown in this table.
  • Any memory device that does not occupy the total region is aliased within that region.

Table 4-1 Overview of MPS2 memory map

Description Modeled Address range
Etherneta Partial 0xA0000000-0xA000FFFF
PSRAM (16MB) Yes 0x60000000-0x60FFFFFF
VGA Image (512x128) (AHB) Yes 0x41100000-0x4110FFFF
VGA Console (AHB) Yes 0x41000000-0x4100FFFF
Block RAM (boot time)b Yes 0x40200000-0x402FFFFF
Reserved N/A 0x40030000-0x401FFFFF
SCC register Yes 0x4002F000-0x4002FFFF
Reserved N/A 0x40029000-0x4002EFFF
FPGA System Control & I/O, APB Yes 0x40028000-0x40028FFF
Reserved N/A 0x40025000-0x40027FFF
Audio I2S, APB Partial 0x40024000-0x40024FFF
SBCon (Audio Configuration), APB Yes 0x40023000-0x40023FFF
SBCon (Touch for LCD module), APB Partial 0x40022000-0x40022FFF
PL022 (SPI for LCD module), APB Partial 0x40021000-0x40021FFF
PL022 (SPI), APB Yes 0x40020000-0x40020FFF
CMSDK system controller Yes 0x4001F000-0x4001FFFF
Reserved for extra GPIO & other AHB peripherals N/A 0x40012000-0x4001EFFF
CMSDK AHB GPIO #1 Yes 0x40011000-0x40011FFF
CMSDK AHB GPIO #0 Yes 0x40010000-0x40010FFF
CMSDK APB subsystem Yes 0x40000000-0x4000FFFF
Reserved N/A 0x20800000-0x20FFFFFF
ZBTSRAM 2 & 3 (2x32-bit)c Yes 0x20000000-0x207FFFFF
Reserved N/A 0x01010000-0x1FFFFFFF
Reserved N/A 0x00800000-0x00FFFFFF
ZBTSRAM 1 (64-bit)d Yes 0x00400000-0x007FFFFF
ZBTSRAM 1 (64-bit) Yes 0x00004000-0x003FFFFF
Mappable memorye Yes 0x00000000-0x00003FFF
a Through ahb_to_extmem16. Offset 0x0-0x0FE for CSRs, 0x100-0x1FE for FIFO.
b Reserved 64KB, 16K implemented. This memory is wrapped through the region.
c Reserved 8MB, 4MB available. The two SRAM blocks are interleaved.
d Wrapped. Only 4MB ZBTSRAM fitted.
e When zbt_boot_ctrl = 0, ZBTSRAM 1 is mapped to this region. Otherwise, Remap_ctrl = 0 maps Block RAM and Remap_ctrl = 1 maps ZBTSRAM 1. The V2M-MPS2 board microcontroller controls the zbt_boot_ctrl signal. The zbt_boot_ctrl signal overrides the boot option to enable use of the ZBT RAM.
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