1.2. About the FPGA testbench

The FPGA testbench is a component part of the ARM Versatile Express Cortex-M Prototyping System, MPS2.

The FPGA testbench includes the FPGA code, which is used to compile the Altera FPGA on the MPS2 system. This enables the testbench to simulate the full FPGA behavior and its interaction with the peripheral devices connected to the MPS2 board.

Before you can simulate the Cortex-M0 processor core as part of the FPGA testbench, you should first download the ARM Cortex-M0 DesignStart Design Kit. It includes obfuscated synthesizable code for the Cortex-M0 processor from DesignStart.

When the obfuscated code for the Cortex-M0 core has been downloaded and installed, you can compile standard C code for the Cortex-M0 processor from DesignStart to exercise both the internal FPGA peripherals and also the external MPS2 peripherals.

The Cortex-M0 DesignStart Design Kit is delivered as a compressed tar file that has to be decompressed and placed in the correct location.

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