|ARM Technical Support Knowledge Articles|
Applies to: C51 C Compiler
Information in this article applies to:
There is a problem with accessing external code memory on the ADuC812:
CODE EXECUTION - TRANSITION FROM INTERNAL TO EXTERNAL CODE SPACE
Background : As with standard 8051 microcontroller functionality the ADuC812 will execute from internal code space when the EA pin is tied high. If the PC rolls over the 8K internal code boundary or is vectored to a location greater than 8K (using a jump instruction for example), the external program memory interface is enabled so as to continue code execution in the external code space.
Issue : A transition from internal to external code will not function correctly.
Specifically the P0 outputs designating the low address byte during an op-code fetch is not driven correctly during the first op-code byte fetch cycle, resulting in incorrect or invalid op-code execution. This anomaly will occur during a code rollover to external memory or a ‘jmp’ or ‘call’ to a subroutine residing in external memory.
Work-Around : User software should execute a ‘MOV P0,#00H’ instruction immediately before a rollover, jump or call to external code space is executed to avoid this anomaly.
More about this problem may be found at http://products.analog.com/products/info.asp?product=ADuC812.
Does the Keil C Compiler adjust for this problem?
No. The C51 compiler does not insert the MOV P0 instruction as suggested by the errata.
The problem is that you cannot split a program into parts that are stored in off-chip ROM and in on-chip ROM and jump back and forth. You must ensure that your software is either all on-chip or all off-chip.
If you have this chip problem, we suggest you contact Analog Devices to see if there are updated chips in which this has been corrected.
Article last edited on: 2005-07-18 09:46:45
Did you find this article helpful? Yes No
How can we improve this article?