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Applies to: uVision Debugger
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What is the STIME/STIME0/STIME1 VTReg and how do I use it?
When simulating a target microcontroller, the Keil uVision Debugger provides Virtual Target Registers (VTRegs) to allow you to provide input to the pins of the simulated device.
The STIME, STIME0, and STIME1 VTRegs allow you to control the timing of the simulated serial port.
STIME0 = 0 /* Set Serial 0 for FAST timing */ STIME0 = 1 /* Set Serial 0 for accurate timing */
Article last edited on: 2005-12-15 08:05:10
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