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Applies to: Advanced RTOS


Information in this article applies to:


How long does the Advanced RTX disable interrupts?


The RTOS configurations for the various platforms are slightly different.

Interrupt Disable on STR71x

The STMicroelectronic STR71x interrupts behaves differently than the behavior of other ARM devices.

On standard ARM devices, the interrupt pending bit is masked by the interrupt enable bit before it is applied to the interrupt logic.

On STR71x ARM devices the enable bit is just a gate for the pending bit and just allows the pending bit to be set. If, after the pending bit is set, the enable bit is cleared the interrupt is still active. The only way to block a pending interrupt is to clear the global IRQ enable bit. This solution is implemented in the ARTX-ARM specific configuration file for the STR71x device (KeilARMStartupSTARTX_Conf_STR71x.C).

The behavior of the STR71x devices acknowledges that interrupts are blocked for a relatively long time (which depends also on the number of running tasks). For 10 running tasks and a CPU speed of 48MHz, the IRQ disable time will be about 20 µSec. If you need interrupt response times faster than that, you should use FIQ interrupts which are never disabled.


Article last edited on: 2007-01-11 12:22:55

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