|ARM Technical Support Knowledge Articles|
Applies to: MCBSTR9 Evaluation Board
Information in this article applies to:
I am using a MCBSTR9 Board and I want my application to boot from Flash Bank1. What must I change in my project to achieve this?
The STR9 device uses two Flash memories: Main Flash (Bank0) and Secondary Flash (Bank1). By default Bank0 is at boot location (address 0x0). By setting the CSX (Chip Select Mapping), Bank1 is selected as boot location (address 0x0). When you set the CSX bit, you must use the ICP algorithms for Flash download.
To boot from Flash Bank1 you must perform following changes:
Flash Boot Bank Enable checked - Boot Bank Size Configuration (BBSR) BBSize: Memory size 32KB - Boot Bank Base Address Configuration (BBADR) BBADDR: Address 0x000000 Flash Non-boot Bank Enable checked - Non-boot Bank Size Configuration (BBSR) BBSize: Memory size 512KB - Non-boot Bank Base Address Configuration (BBADR) BBADDR: Address 0x400000
Configuration CSX (Chip Select Mapping) checked
IROM1: Start 0x000000 size 0x8000 IROM2: Start 0x400000 size 0x80000
STR91xFxx4 Flash Bank1 ICP STR91x CFG & Security ICPchange the Start Address for STR91xFxx4 Flash Bank1 ICP to 0x00000000.
The attached Blinky project shows the configuration for booting from Flash Bank0 or Flash Bank1.
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Article last edited on: 2008-12-22 00:43:11
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