ARM Technical Support Knowledge Articles

How do I switch the debugger connection between JTAG and SWD (Serial Wire Debug) protocol?

Applies to: Debug Access Port (DAP)


The SWJ-DP component supports both protocols - Serial Wire and JTAG. The selector is part of the SWJ-DP.

The default protocol at power-up is JTAG, so if you want to use Serial Wire, you need to use the TCK and TMS pins to scan in a special 'key', which is a sequence of TMS values which has no effect for a pure JTAG TAP but is recognized by a SWJ-DP TAP as a request to switch into Serial Wire mode. Similarly, there is another another TMS sequence to switch back from SWD to JTAG protocol.

The key sequences for switching to Serial Wire mode and back again are described in section 5.2 of the

  ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2

  Architecture specification

(or "ADIv5.2") which can be found at:

   -> CoreSight on-chip trace and debug

       -> Architecture specifications

           -> Debug Interface Architecture Specification ADIv5.0 to ADIv5.2

The 16-bit JTAG-to-SWD select sequence is 0b0111 1001 1110 0111, most-significant-bit (MSB) first. This can be represented as one of the following:
• 0x79E7, transmitted MSB first.
• 0xE79E, transmitted least-significant-bit (LSB) first.

The 16-bit SWD-to-JTAG select sequence is 0b0011 1100 1110 0111, MSB first. This can be represented as either of the following:
• 0x3CE7, transmitted MSB first
• 0xE73C, transmitted LSB first.

More recent versions of SWJ-DP implement SWD Protocol version 2, which introduces a Dormant state as well as JTAG and SWD states. Dormant operation is described in section 5.3 of the ADIv5.2 document.

Differences between version 1 and version 2 of the SWD protocol are described in section 4.2.1 of the ADIv5.2 document.

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