Can Cortex-M3/4 have a pending Halt after Reset?

Applies to: Cortex-M3, Cortex-M4

Answer

C_HALT in the Debug Halting Control and Status Register (DHCSR) is cleared by Reset, so a Halt could not be pended across a Reset in thsi way. To halt from reset, use the VC_CORERESET vector catch in the DEMCR.

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