ARM Technical Support Knowledge Articles

What is the relationship between HBURST and the PL081 DMAC Burst Size?

Applies to: PL08x DMAC (DM & SM)


What is the value of the AHB signal HBURST when the DMAC Burst size is set to 256 (3''b111)? 
In the case where the width of the transfer data is 32bit, is HBURST same as Burst size when 
Burst size is 3'b000, 3'b001, 3'b010, or 3b'011?


The HBURST value is unrelated to the DMAC burst properties; it is more a
function of the FIFO depth inside the PL081.

With a FIFO depth of four words, the PL081 is never going to issue an
HBURST greater than 4. For a DBSize = SBSize = 4 (3'b001), the FIFO will
read 4 words using an INCR4 AHB burst. This fills the FIFO. The FIFO
then writes the four words, again using an INCR4 burst. Since there is
only a single master to perform both the reads and writes, each
FIFO-input or FIFO-output burst MUST complete before the other one

This process is the same for all bursts larger than 3'b001. For bursts
of size 3'b000, the DMAC will issue AHB INCR bursts of length 1 to
transfer the data.

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