|ARM Technical Support Knowledge Articles|
Applies to: PL330 AXI DMA Controller
The maximum transfer size is governed by the AXI burst limitation of 128 bytes width (1024 bits) x 16 beats. This equates to 2048 bytes. These contraints also happen to be the maximum values allowed when programming the CC_n registers in PL330, i.e. src/dst_burst_size = 128 bytes (3'b111, max), src/dst_burst_len = 16 data transfers (4'b1111, max). Any burst transfer, regardless of source or destination width, is limited to a maximum of 16 beats.
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