ARM Technical Support Knowledge Articles

In a system, can PL310 run at half the clock frequecy of Corxtex-A9?

Applies to: AXI PL310 L2CC

Answer

Yes, this is possible. For Cortex-A9, the AXI bus clock domain can be run at n:1 (AXI: processor ratio to CLK) using the ACLKEN signal. But all the bus interfaces  must be synchronous with reference to processor input clock CLK. Please refer to section 2.3 of the Cortex-A9 TRM for a simple example explaining 3:1 AXI to processor clock ratio using ACLKEN.

Also, you may refer to <PL310-bundle>/logical/pl310/PL310_Integration_kit/toplevel_integration for example of PL310 integration with Cortex-A9.

Rate this article

[Bad]
|
|
[Good]
Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential