ARM Technical Support Knowledge Articles

What is the maximum AXI burst length in PL341? How is this affected by the FIFO depths?

Applies to: PL301 AMBA 3 HP Matrix, PL341 AXI DDRII Dynamic Memory Controller


The maximum AXI burst size is 16, as per the AXI specification.

The configurable parameters Write FIFO Depth and Read FIFO Depth have no
bearing on the number of beats that PL341 can perform in any burst.
A FIFO depth of 32 allows for two sixteen-beat bursts to be queued or 
four eight-beat bursts etc.
Having said that, on the Memory Interface, the PL341 burst length is
limited to a maximum of four beats.

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