|ARM Technical Support Knowledge Articles|
Applies to: PL111 Colour LCD Controller
The BCD field is provided as an *option* to maintain a 1:1 CLCDCLK:CLCP clock ratio if that's what's wanted, or needed, by the LCD panel. This option is only really used for TFT displays. Should it be that the CLCP clock needs to run slower than CLCDCLK then the Panel Clock Divider (PCD) will need to be used and the BCD field must be set to '0' to avoid bypassing the PCD.
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