ARM Technical Support Knowledge Articles

Does the Cortex-R4 support pre-loading of code from main memory into the Instruction Cache?

Applies to: Cortex-R4

Answer

No.

Data cache preloading by means of the PLD instruction is supported in
the Cortex-R4 but, unfortunately, instruction cache preloading (PLI
instruction) is not supported.

Rate this article

[Bad]
|
|
[Good]
Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential