ARM Technical Support Knowledge Articles

Is the row boundary crossing possible in case of WRAP bursts ?

Applies to: PL341 AXI DDRII Dynamic Memory Controller


The AXI protocol does not impose any restrictions on memory row boundary crossing for WRAP or INCR bursts.  AXI protocol only states that bursts must not cross 4KB boundaries. The maximum amount of data that can be transferred in a WRAP (or INCR)  burst = 16 * 64 bits (16 is
the max AWSIZE and 64 is the maximum configurable AXI data width in PL341).

Therefore, for DRAMs which typically have 1KB and larger row boundaries, WRAPs can never cross row boundaries.

However, an INCR burst can still cross a row boundary. In that case, the AXI burst would be simply broken down into appropriate bursts at the memory interface such that each memory burst is for a single row only.

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