What is the correct value of "chip_nmbr" bits in direct cmd register to enter DPD state of all memory devices simultaneously with global CKE configuration?

Applies to: PL340 AXI SDRAM Controller

Answer

The following encoding of the direct command register should be used to enter all the memory devices connected to PL340 simultaneously:

Bits            Name            Value
====            ====            =====
[22]            ext_mem_cmd     1
[21:20]         chip_nmbr       2'b00
[19:18]         memory_cmd      2'b00
[17:16]         bank_addr       0
[15:14]         -               0
[13:0]          addr            0

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