ARM Technical Support Knowledge Articles

How does the ARM compiler allow for the configurable multiplier in the Cortex-M0?

Applies to: Cortex-M0, DS-5, RealView Development Suite (RVDS)

Answer

The Cortex-M0 processor can be implemented with one of two hardware multiply options:

The compiler will use a MULS instruction to multiply two integer variables.  To multiply by a constant, the compiler can either use a sequence of add and shift operations, or the MULS instruction.  To generate the fastest code, the compiler must know how long the MULS instruction will take to execute.

The compiler switch --multiply_latency can be used to specify how long the MULS instruction will take to execute.  This defaults to single-cycle.

For example:

int foo(int n)
{
       return n * 13;
}

Compiled with armcc --cpu=Cortex-M0 -Otime generates a MULS instruction:

MOVS r1,#0xd
MULS r0,r1,r0
BX lr

Compiled with armcc --cpu=Cortex-M0 -Otime --multiply_latency=33 generates a sequence of add and shift instructions:

LSLS r1,r0,#2
ADDS r1,r0,r1
LSLS r0,r0,#3
ADDS r0,r1,r0
BX lr

Article last edited on: 2012-03-05 10:39:54

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