ARM Technical Support Knowledge Articles

Why does semi hosting fail with specific bit patterns at the SVC vector?

Applies to: RealView Development Suite (RVDS)

Answer

A defect in RVD can cause semi hosting operations to fail with the following error, for specific bit patterns at the SVC vector.

"Stopped due to unknown reasons Stopped at 0x00000008: <Unknown>"

 This behaviour is caused by a defect, related to the debugger misinterpreting opcode patterns.  Any instruction at the SVC vector where the lower nibble of the top byte is 0xF (i.e. xFxxxxxx ) will cause the problem.

A fix is now available in RVDS 4.0 Service Pack 1.

Rate this article

[Bad]
|
|
[Good]
Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential