ARM Technical Support Knowledge Articles

What is the purpose of DMAFLUSHP?

Applies to: PL330 AXI DMA Controller


When the peripheral receives a flush request on the da-channel, i.e. datype[1:0] = 0b10 which corresponds to "request for flush of level status", the peripheral must complete any outstanding activity on the dr-channel.

PL330 supports peripherals with multiple outstanding burst or single requests. If the peripheral also supports multiple outstanding burst or single requests, it needs to keep track of how many it has sent. Therefore, when the acknowledges return, the peripheral can decrement its count.

If the peripheral receives a flush request it must zero these counters and send a flush-acknowledge response on the dr-channel - drtype = 0b10 - before re-sending all of its FIFO level information, i.e. before sending DMA requests to indicate its current FIFO level status.

This indicates that the new (i.e. post-flush) requests are based upon a re-evaluation of the FIFO levels, and are not just a blind copy of the previous requests which were sent.

At the PL330, a counter is kept for both single and burst-levels. The single counter is incremented when a single-level is sent and similarly for the burst counter. When the burst counter is not zero, the single counter is held at zero.

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