ARM Technical Support Knowledge Articles

How do I change clock settings on the PBX-A9?

Applies to: PBX-A9

Answer

Scenario:

On the PBX-A9 the default CPU clock frequency is 70Mhz and the default internal and external AXI bus frequency is 70Mhz. These values have been selected to provide the highest performance whilst keeping the system stability, however users often want to change the default clock settings for benchmarking, test purposes, etc.

An inappropriate procedure to change the clock settings can lead to system lock-up problems and as a consequence the need of issuing a hardware reset for system recovery.

In this Knowledge Article we explain the clock switching procedure to change the clock settings safely. 

Solution:

The PBX-A9 contains eight programmable clock generators (oscillators) that provide reference frequencies to different components on board. Some of these clocks must not be changed. Please refer to the PBX-A9 User Guide for a description of the PBX-A9 clocks.

infocenter.arm.com/help/topic/com.arm.doc.dui0440a/DUI0440A_PBX_A9_user_guide.pdf

This Knowledge Article focuses on varying the CPU and the internal and external AXI clocks, OSCCLK7 and OSCCLK5, for performance purposes and benchmarking. Following are the procedures to control the output values of these clock generators.

Method 1:

The Boot Monitor "Configure" sub-menu has a command that shows the available oscillators on the motherboard and the correspondent reset frequencies. It also has a command that allows for changing the oscillators output frequency.

As an example, below it shows how to change OSCCLK7 which is the reference clock for the CPU. The Boot Monitor makes changes to the clock frequency in small increments until the target frequency is reached. This is why the change appears to take effect inmediately and a software reset is not necessary.

ARM PBX Boot Monitor
Version:    V4.1.7
Build Date: Feb 17 2009
Tile Site 1: Cortex A9 with 3 cores
Tile Site 2: Tile Not Fitted
Endian:     Little
> CONFIGURE
Configure> DISPLAY CLOCKS
Clocks
======
  Clock 0  frequency = 100.00MHz
  Clock 1  frequency = 33.00MHz
  Clock 2  frequency = 25.00MHz
  Clock 3  frequency = 50.00MHz
  Clock 4  frequency = 25.00MHz
  Clock 5  frequency = 14.00MHz
  Clock 6  frequency = 24.00MHz
  Clock 7  frequency = 14.00MHz
Configure> SET CLOCK 7 FREQUENCY 10
Configure> DISPLAY CLOCKS
Clocks
======
  Clock 0  frequency = 100.00MHz
  Clock 1  frequency = 33.00MHz
  Clock 2  frequency = 25.00MHz
  Clock 3  frequency = 50.00MHz
  Clock 4  frequency = 25.00MHz
  Clock 5  frequency = 14.00MHz
  Clock 6  frequency = 24.00MHz
  Clock 7  frequency = 10.00MHz

The following two methods require manual configuration of the oscillator registers. A debugger like RVD needs to be used to set the SYS_OSCx and SYS_OSCRESETx registers in order to vary the frequency of each individual OSCCLKx.

The oscillator output frequency is obtained from the formula:

OSCCLKx= 48 * (VDW+8) / (RDW+2) * OD

where VDW, RDW and OD are the parameters from the SYS_OSCx registers. Refer to the PBX-A9 User Guide for further details.


Method 2: Clock switching by programming the SYS_OSCx registers

The sequence explained below changes the oscillator output frequency at runtime, therefore the SYS_OSCx registers must be programmed carefully to avoid a system lock up. This translates into the restriction of varying only the VDW parameter and keep the default RDW and OD parameters avoiding a possible system lock up. The changes take effect inmediately, thus it is not needed to issue a software reset.

The following sequence is an example to change the reference clocks for the CPU (OSCCLK7) and the external AXI bus (OSCCLK5):

  1. Write value 0xA05F to the SYS_LOCK register @ 0x10000020. This unlocks the clock control registers for modification.
  2. If required, write the new ICS307 control value to the SYS_OSC7 register @ 0x100000EC and to the SYS_OSC5 @ 0x100000D4. 
  3. After writing to SYS_OSC7 and SYS_OSC5, they must be relocked by writing any value other than 0xA05F to the SYS_LOCK register @ 0x10000020. 
  4. The change takes effect immediately. The new values should appear in SYS_OSC7 @ 0x100000EC and in SYS_OSC5 @ 0x100000D4.
  5. Run your test code and verify that the system is stable with the new settings.

The following table shows some example register configurations for different CPU and external AXI bus frequencies.

OSCCLK5 [Mhz]

SYS_OSC5 @0x100000D4 OSCCLK7 [Mhz] SYS_OSC7 @0x100000EC CPU [Mhz] External AXI [Mhz]
14 0x00002C3E 14 0x00002C3E 70 70
13 0x00002C39 13 0x00002C39 65 65
12 0x00002C34 12 0x00002C34 60 60
11 0x00002C2F 11 0x00002C2F 55 55
10 0x00002C2A 10 0x00002C2A 50 50

IMPORTANT NOTE: Although all permutations of OSCCLK5 and OSCCLK7 values in the table above have been tested running a simple application, we cannot guarantee the correct behavior of the system outside the default frequency settings.

Method 3: Clock switching by programming the SYS_OSCRESETx registers

The sequence explained below changes the oscillator output frequency after a software reset avoiding a system lock up. The following sequence is an example to change the reference clock for the CPU:

  1. Write value 0xA05F to the SYS_LOCK register @ 0x10000020. This unlocks the clock control registers for modification.
  2. If required, write the new ICS307 control value to the SYS_OSCRESET7 register @ 0x100000F0.
  3. Disconnect from the debugger and press the RESET button S2 on board.
  4. The new REFCLK value should appear in SYS_OSC7 @ 0x100000EC.
  5. Run your test code and verify that the system is stable with the new settings.

Article last edited on: 2010-01-21 10:17:32

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