ARM Technical Support Knowledge Articles

What is the purpose of the DEBUG_LVL and TRACE_LVL configuration parameters?

Applies to: Cortex-M3

Answer

These two parameters allow you to implement the processor with varying levels of debug and trace support, by altering the DEBUG_LVL and TRACE_LVL parameters, respectively.

In a nutshell, the DEBUG_LVL parameter has four possible values:

0: No debug: debug port removed.
1: Limited debug: 2 breakpoints and one watchpoint.
2: Full debug: 8 breakpoints without data matching.
3: Full debug: 8 breakpoints with data matching.

Similarly, TRACE_LVL gives:

0: No trace capability.
1: Standard trace
2: Full trace (no HTM port)
3: Full trace with HTM port.

Complete details of these parameters can be found in the Cortex-M3 Configuration and Sign-off guide, available to licensees as part of the deliverables.

ETM tracing is available at trace levels 2 and 3 but not levels 0 and 1.

There are some caveats to all this, namely:

that a nonzero TRACE_LVL is only supported if DEBUG_LVL is also nonzero, and

DEBUG_LVL overrides TRACE_LVL for the number of DWT and FPB comparators. Essentially, DEBUG_LVL trumps TRACE_LVL.

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