ARM Technical Support Knowledge Articles

How do I change clock settings on the EB+CT-R4F?

Applies to: CTR4

Answer

Scenario

On the EB+CT-R4F system the default CPU clock frequency is 250Mhz and the default AXI bus frequency is 38Mhz.

These values have been selected to provide the highest performance whilst keeping system stability, however users often want to change the default clock settings for benchmarking, test purposes, etc.

An inappropriate procedure to change the clock settings can lead to system lock-up problems and as a consequence the need to issue a hardware reset for system recovery.

In this Knowledge Article we discuss some alternative methods that can be used to change the clock settings safely.

Solution:

The EB system uses five programmable clock generators (oscillators) that provide reference frequencies to different components on board. Please refer to the EB User Guide for a description of the EB clocks.

infocenter.arm.com/help/topic/com.arm.doc.dui0411c/DUI0411C_emulation_baseboard_lead_free_user_guide.pdf

The CT-R4F provides five external clocks for the ARM Cortex-R4F test chip. Please refer to the CT-R4F User Guide for a description of the CT-R4F clocks.

infocenter.arm.com/help/topic/com.arm.doc.dui0441a/DUI0441A_ct_r4_user_guide.pdf

Following are the possible methods to control the CPU frequency on an EB+CT-R4F system. For both methods, a debugger like RVD needs to be used to set the correspondent registers.

Method 1:

This method consists on modifying the PLL0 settings on the Test Chip. For that, a specific R4F Test Chip serial configuration register needs to be set accordingly to the parameters M and N that you need to modify to obtain a specific CPU frequency. This register must be set through a EB system register, CT_R4F_TC_CFG0.

For more information on the CT_R4F_TC_CFGx registers please refer to AN217, which is available from the ARM Website:

infocenter.arm.com/help/topic/com.arm.doc.dai0217a/DAI0217A_an217_ct-r4f_with_eb.pdf

The CPU frequency is calculated according to the following formula:

CPUCLK=REFCLK x M/N

Where REFCLK is the reference clock for the CPU. It is generated by the CT-R4F oscillator OSC0 and the default is 50MHz. 

The following sequence is an example to change the M and N parameters of PLL0:

  1. Write value 0xA05F to the SYS_LOCK register @ 0x10000020. This unlocks the clock control registers for modification.
  2. Modify M and N parameters of the CT_R4F_TC_CFG0 register @0x10000074.
  3. Disconnect from the debugger and press the RESET button S2 on board (located next to LED D8). 
  4. Run your test code and verify that the system is stable with the new settings.

The following table shows some example register configurations for different M and N values.

M N

CPU Freq[Mhz]

5 1 250
9 2 225
4 1 200
7 2 175
3 1 150
5 2 125
2 1 100

Method 2:

This method consists on varying the reference clock for the PLL0. It requires manual configuration of the oscillators registers, SYS_OSCRESETx, in order to vary the frequency of OSCCLK0 which output is the reference clock for PLL0. The following sequence is an example to change the reference clock for the CPU:

  1. Write value 0xA05F to the SYS_LOCK register @ 0x10000020. This unlocks the clock control registers for modification.
  2. If required, write the new ICS307 control value to the CT_R4F_OSCRESET0 register @ 0x10000120.
  3. Disconnect from the debugger and press the RESET button S2 on board.
  4. The new REFCLK value should appear in CT_R4F_OSC0 @ 0x10000110.
  5. Run your test code and verify that the system is stable with the new settings.

The following table shows some example register configurations for different reference frequencies.

REFCLK(OSC0) [Mhz]

CT_R4F_OSCRESET0 @0x10000120

CPU [Mhz]

50 0x32C5C 250
45 0x32C52 225
40 0x32C48 200
35 0x32C3E 175
30 0x32C34 150
25 0x32C2A 125
20 0x32C20 100

IMPORTANT NOTE: The reference values and parameters shown in the tables above are just a simple example and the user must be aware that depending on the application running some values might not guarantee the correct behavior of the system.

Article last edited on: 2009-12-18 13:11:25

Rate this article

[Bad]
|
|
[Good]
Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential