|ARM Technical Support Knowledge Articles|
Applies to: ARM966E-S
The ARM966E-S processor will use SINGLE/INCR4/8/16 bursts to transfer multiple register-data when executing LDM and STM instructions. For example, a LDM of 10 registers will be split up into an INCR8 burst and 2 SINGLE transfers. Similarly, a STM of 5 registers will be split up as an INCR4 burst plus 1 SINGLE.
A LDM/STM of all 16 registers should be executed as an INCR16 burst. Only word-wide transfers are supported with fixed-length incrementing
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