ARM Technical Support Knowledge Articles

How can I change the debug control bits in the Debug Status and Control Register?

Applies to: ARM1176


Table 3-14 "Debug Status and Control Register bit field definitions" in the ARM1176 TRM shows which bits of the DSC Register can be accessed from the core (via a cp14 instruction) and those which can only be accessed externally (via the JTAG scan chains).

Bits[15:14] control whether Monitor Debug Mode is enabled (bit[15]) or whether Halt Mode Debug is enabled (bit[14]). Also, the table indicates that bit[15] can *only* be modified from the core, via a cp14 instruction, and bit[14] can *only* be modified via JTAG.

Trying to set DSCR[15:14] = b10 via JTAG will therefore fail because bit[15] cannot be set using JTAG. It should be possible, although this has not been validated, to scan in an appropriate cp14 instruction via the ITR (Instruction Transfer Register) which would then set bit[15] in the DSC Register, thereby bypassing the restrictions mentioned previously.

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