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Applies to: Generic CoreSight Components
The JEDEC JEP106 Maufacturer ID code is administered by the JEDEC Solid State Technology Association and provides a unique identification number for each participating electronic design or manufacturing company. In ARM CoreSight systems, as in previous generations of ARM products, the JEP106 code is used as part of the ID code of individual components and full SoC chips.
The latest copy of the JEP106 "Standard Manufacturer's Identification Code" is available from http://www.jedec.org as a free download to registered users.
JEP106 provides for a 7-bit "Identity Code" plus a mechanism for extending the range of codes by use of a "Continuation Code". The specified mechanism is that an Identity Code of 0x7F represents the "Continuation Code" and implies the presence of an additional Identity Code field, and this mechanism may be extended to multiple Continuation Codes followed by the manufacturer's Identity Code. However, for reasons of efficiency, ARM's usage of the JEP106 code compresses the representation of the Continuation Code into a 4-bit field indicating the number of Continuation Codes in a manufacturer's ID code.
For example, ARM has Identity Code 0x7F 0x7F 0x7F 0x7F 0x3B, which is code 0x3B on the fifth 'page'. In the ARM representation, this is a JEP106 Identity Code of 0x3B and a JEP106 Continuation Code of 0x4 to represent the four Continuation Codes preceding the Identity Code.
Note that depending upon the register formatting, this is sometimes seen as 0x23B (packing the 4 bit Continuation Code in front of the 7-bit Identity Code), as 0x477 (similarly, with a trailing '1' in bit of a 12-bit field), or as 0x4BB (with a '1' for "JEDEC Code is Used" in front of the 7-bit Identity Code).
For CoreSight components, the JEP106 code is used to indicate the designer (not the manufacturer) of the CoreSight component. A debugger will be expected to use the designer and the part number of the component to identify the properties of the component, and therefore the chip designer is not permitted to modify these features of most CoreSight components, including the JTAG or Serial Wire Debug Access Port's IDCODE register. (The TAP must identify itself as an ARM JTAG or Serial Wire Debug Port in order for the debugger to know how to interact with it.)
The one place where the chip designer should modify the JEP106 code is in the PeripheralID (PID) registers of the CoreSight Debug ROM Table(s). The designer and part number fields of the top level ROM Tables behind a Debug Access Port are taken to uniquely represent the subsystem accessed through each Access Port, and when combined together, are taken to represent the unique identity of the specific chip design. Once the chip designer has inserted his own JEP106 code in the JEP106 Identity Code and JEP106 Continuation Code fields of the ROM Table's PID registers, the remaining part numbering fields in those PID registers (Part Number, Revision, RevAnd, Customer Modified) become that company's proprietary numbering space.
This ARM implementation with a 4-bit continuation field is limited to 15 Continuation Codes (16 pages); as of mid 2010, JEDEC has assigned approximately 8 pages of codes.
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