What causes the lockup_err bit to be asserted?

Applies to: PL330 AXI DMA Controller

Answer

This happens where there is insufficient space in the MFIFO for all the expected data. The controller can also be configured to generate an interrupt in addition to the lockup_err bit being asserted.

The lockup_err/interrupts do not indicate overflow of the MFIFO but indicate that there is insufficient space in the MFIFO for the expected data. The MFIFO can even be less than full at the time; the detection occurs when all of the running channels are prevented from executing a load, and the store queue has been emptied so there is no prospect of any more free space appearing in the MFIFO.  There might be some free space, but not enough for the beats required.

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