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During some tests with a Cortex-M3 beased device like toggling a general IO pin I have noticed, that the target hardware is slower than simulation.
What is the reason for this difference?
The Cortex-M3 simulation is cycle accurate with the following exceptions:
In general this means that simulator will show a bit faster execution.
We can say simulation will slightly differ from the hardware regarding cycles due to some Cortex-M features are not fully simulated and due to different vendor specific memory interfaces implementations which are also do not simulated.
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Article last edited on: 2010-07-21 06:06:21
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