ARM Technical Support Knowledge Articles

Do armcc and armclang provide memory barrier intrinsics?

Applies to: DS-5, RealView Development Suite (RVDS)


The barrier intrinsics __isb(<option>), __dsb(<option>) and __dmb(<option>) are described in the ARM C Language Extensions (ACLE) document. These intrinsics are supported in ARM Compiler 5.06 (armcc) and later, and ARM Compiler 6 (armclang).

These intrinsics take an unsigned int parameter. This parameter maps onto a 4-bit field within the barrier instruction encoding used to specify an optional limitation on the operation.

For example:

void foo(void)

By passing 0xf as a parameter for each intrinsic encodes the bottom four bits as 1111, which means that 'full system' is the required shareability domain, and that reads and writes are the required access types. Although this can be omitted according to the ARM Architecture Reference Manual, you must specify this parameter for the memory barrier intrinsics, otherwise the compiler will treat these as references to functions. For __dmb and __dsb intrinsics it is implementation defined whether options other than 'full system' are implemented. For the __isb intrinsic all other encodings are reserved.

Header file <arm_acle.h> defines the ARM C Language Extensions and must be included in order to use the memory barrier intrinsics.

Note1: The above barrier intrinsics do not currently implicitly act as a sequence point. A sequence point is where operations before and operations after the sequence point are not merged by the compiler. Therefore, when using armcc it is currently also necessary to insert __schedule_barrier intrinsics either side of the memory barrier intrinsic, for example:


Note2: Version 6.5 and later of armclang support the __schedule_barrier intrinsic, but it does not operate in the same way as in armcc, and does not guarantee a sequence point. Strict sequence points are not possible in armclang.


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