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CoreSight DK11 Integration Manual ARM DII 0092E defines SoC Part Number[3:0] in both Peripheral ID1 and Peripheral ID0 registers

Applies to: Generic CoreSight Components


It is a typographical error.

The construction of the Peripheral ID register content can be found in Figure 13-7 of the ARM Debug Interface v5 Architecture Specification (ADIv5).

Peripheral ID1[3:0] = SoC Part Number[11:8]

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