|ARM Technical Support Knowledge Articles|
Applies to: Cortex-A15
When you are in L2 standby mode (STANDBYWFIL2=1) and clock is active (CLKEN=1), then the GIC clock is active (along with timers and other L2 logic). Interrupts arriving will be sent to CPUs. If CPUs are powered down, the nIRQOUT/nFIQOUT output to the power controller notifies that there is a pending interrupt to that CPU and the CPU needs to be powered up to service the interrupt. Note that the nIRQOUT/nFIQOUT outputs are never disabled. When you are in L2 standby mode (STANDBYWFIL2=1) and clock is inactive (CLKEN=0), then this forces ALL clocks to be gated at the top-level, so the GIC has no clock and the wake-up logic has no clock. nIRQOUT/nFIQOUT/STANDBYWFIL2 cannot change. In this state, the SOC controller needs to decide when to restore CLKEN and may need to look at all the interrupt sources to decide.
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