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Applies to: ARMv8-A
Unlike the A32 instruction set conditional execution is only available for a limited number of instructions in A64.
Most control flow in A64 is expected to be implemented with conditional branch instructions. A number of variations are provided.
PC relative conditional jump to label with a +/-1MB range, cond can be any one of the standard condition codes. The PSTATE condition flags are also used as inputs to these instructions. For example:
will branch to label if the equal conditions is true, i.e. condition flag z==1.
There are also conditional branch instructions that take a register input. For instance:
CBZ Wn, label
Compare and branch if zero will perform a PC relative branch to label if the value of
Wn is zero. There are also variants that take X registers and that branch if not zero (
TBZ, Test bit and Branch if Zero, and
TBNZ, Test bit and Branch if Nonzero instructions test the value of a bit in a general-purpose register and conditionally branch to a label.
A64 has conditional set and read instructions using the ALU condition flags.
CSEL Wd, Wn, Wm, cond
Conditional select where if cond is true
Wn is moved into
Wm is moved into
Wd. For example:
CSEL W1, W2, W3, EQ
will move the value
W1 if the
EQ condition is true (i.e. z==1,) else the value of
W3 will be moved into
W1. This instruction is analogous to the ternary operation in C.
There are variants of these conditional operations, some of which allow conditional increments, negations and inversions.
Article last edited on: 2015-02-17 16:22:32
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