ARM Technical Support Knowledge Articles

Which Execution State (AArch) is the processor in?

Applies to: ARMv8-A


There is no way for a software routine to self-detect the current Execution State as this state is implicit. This is because the current instruction set must be targeted to the proper Execution State for the processor to execute properly.

However, when using a debugger the Execution State can be read and is generally displayed as part of the state of the processor.

Alternatively, an OS may wish to know the Execution State of an application.  The Mode field in the SPSR_EL1 is used to hold the mode that an exception came from. M[4] is used to hold the Register Width of that mode. Where:

0: 64-bit Register Width (AArch64)

1: 32-bit Register Width (AArch32)

The same same mechanism can be used by a Hypervisor at EL2 or the Secure Monitor at EL3 to determine the execution state of the lower exception levels.

Article last edited on: 2015-02-17 16:21:08

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