|ARM Technical Support Knowledge Articles|
Chip designers who have licensed the Cortex-M3 or Cortex-M4 processor can easily measure the performance of the processor in simulation by choosing to generate a "tarmac.log" file in their simulation run.
Each line in this file starts with a timestamp.
Lines corresponding to execution of individual instructions include a unique "tag" field for each instance of that instruction being executed.
The "tag" field is structured as:
( <memory address of the instruction> : <instruction count> )
So the execution performance (instructions per second) can easily be calculated between any two instructions in the execution history simply by calculating the difference in hexadecimal <instruction count> divided by the difference in the timestamps of those lines.
Note that the tarmac log files for Cortex-M0 and Cortex-M0+ do not include this tag field, and would therefore require some further work to calculate the number of instructions contained in the listing between the points of interest.
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