ARM Technical Support Knowledge Articles

AHB-lite - Can HWDATA change in the 2nd cycle of an ERROR response ?

Applies to: AHB


The AHB-lite protocol (ARM IHI 0033A) shows in figure 5-1 "ERROR response" that when an ERROR response is being returned, and the master decides to end the current burst, the HWDATA bus can change at the start of the final cycle of the data phase transfer.

However it is recommended, but not required, that a master keeps HWDATA stable for all cycles of a write transfer that receives an ERROR response.

Note that a slave returning an ERROR response must not require that HWDATA is stable after the first cycle of the error response.

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