|ARM Technical Support Knowledge Articles|
Applies to: Cortex-M7
This Knowledge Article applies to engineers at companies which have licensed the Cortex-M7 processor Verilog RTL for use in System-on-Chip designs.
The Cortex-M7 processor RTL is delivered together with an optional capability for the licensee to generate an obscured simulation model of the configured processor, called a Design Simulation Model (DSM), which may be used for distribution in-house and to end-customers, for the purpose of simulating the chip design containing that processor configuration, without exposing the content of that processor IP to the wider audience.
Section 3.1 of the ARM_Cortex-M7-r1p1-00rel0_ReleaseNote.pdf describes which versions of software tools were used in development of the Cortex-M7 r1p1-00rel0 release. The perl version is specified thus:
- Perl 5.12.3 (note: only required for the Integration Kit)
The BuildCORTEXM7_DSM.pl script is sensitive to the perl version. Older versions of perl, such as 5.8.8, result in the syntax error shown. The solution is to update the shell environment so that 'perl' resolves to the version indicated in the Release Note.
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