|ARM Technical Support Knowledge Articles|
Applies to: Cortex-M3
This Knowledge Article is relevant to chip designers who have licensed the Cortex-M3 processor for use in their chip designs.
The processor design is delivered to licensees as an RTL description, together with an example design and testbench which can be used to simulate the processor behavior, and a number of test programs which can be run in simulation.
The testbench includes the capability to simulate debug operations through a SWJIM component connected to the processor's debug slave interface. Debug operations are expressed in low level BST commands and higher level DAP Macro Language commands. Documentation of these instruction formats is provided in the
./example/coresight/doc/. directory in the Cortex-M3 release.
The example programs stored under the
./example/Software/. directory can be run via the
run_example script, as described in the
README file, both in directory
./example/. The test programs are either simple 'C' programs ( <testname>.c ) to be executed on the processor, or combined 'C' and DAPML programs, ( <testname>.cdapml ) where the 'C' code is executed on the processor while the DAPML debug sequence is simultaneously applied to the processor's debug interface.
By default, the SWJIM component generates the debug sequences using the JTAG protocol on the debug interface connection. The protocol can be switched to ARM's 2-pin Serial Wire Debug protocol by including a DAP Macro Language switching sequence in the program. For example:
PRINTF "Switch to SWD mode" DAP_DP_SWITCHMODE PRINTF "Checking SW-DP IDCODE" DAP_READ_DPACC DPIDCODE 2BA01477
The JTAG and SWD portions of the debug sequence are processed separately. The SWD portion is handled by a script called
SWIMconvert.pl, and is executed in simulation by a module called
SWDriver.v instantiated within the SWJIM.
A number of the BST commands documented in the
BSTUserGuide.pdf are not implemented in the Serial Wire processing script and driver module, or exhibit differences in syntax and behavior compared to those documented in the PDF file.
Some instructions are not supported at all, for example the
../shared/logical/bin/SWIMconvert.pl bin/test_dapml_SWIM.bsi bin/test_dapml_SWIM.hex Unrecognised line : line 130 WAIT 8 ../shared/logical/bin/SWIMconvert.pl bin/test_dapml_SWIM.bsi bin/test_dapml_SWIM.hex Unrecognised line : line 130 LOOPZ 5 B2
However, code loops can still be implemented by use of arithmetic operations and conditional branches. Delays may be included by performing redundant operations, such as a register read with all bit positions masked.
PRINT <var> : writes out the current value of <var> to the console and log.bst_tube
The version of
SWDriver.v provided with Cortex-M3 versions up to and including r2p1-00rel0 does not print to either of these locations, but prints to the file
Printing to the console (simulation transcript) can be added by replacing the original
SWDriver.v with the patched version attached here, in directory
The arithmetic and logical operations
EOR are implemented in Cortex-M3 versions up to and including r2p1-00rel0 in the
SWIMconvert.pl script as 3-operand instructions of the form:
<operator> <destination reg> <source reg> <operand register | #hex constant>
However, they are documented (and implemented in JTAG mode) as 2-operand instructions, where the first operand is both the source and the destination register.
Support for the correct 2-operand syntax can be added by replacing
SWIMconvert.pl with the patched version attached here, in directory
(Note also that attempting to execute the 3-operand form in JTAG mode may not produce any error in compilation, but may result in unexpected execution where the first argument is taken as both destination and source register, the second argument is taken as the other operand, and the third operand is ignored.)
Making these adjustments, a simple looping program which works correctly in JTAG protocol can be seen also to work correctly in SW protocol mode. For example, the
test_bst.cdapml program attached results in a simulation transcript similar to the following (Mentor Questasim) run:
# do simulator.cmds # TUBE: SWDriver ARM support patch gc.1.0.0 - PRINT <var> to console as well as to log.swim # TUBE: SWIM End of pre-loaded code at 00000109 # TUBE: SWJIM End of pre-loaded code at 00000006 ... # # TUBE: "Checking SW-DP IDCODE" # TUBE: Variable # 5 ; Value = 0000003c # TUBE: Variable # 4 ; Value = 0000000f # TUBE: " " # TUBE: "Entering loop on variable 5..." # TUBE: " looping on 5..." # TUBE: " sub 5 4" # TUBE: Variable # 5 ; Value = 0000002d # TUBE: " looping on 5..." # TUBE: " sub 5 4" # TUBE: Variable # 5 ; Value = 0000001e # TUBE: " looping on 5..." # TUBE: " sub 5 4" # TUBE: Variable # 5 ; Value = 0000000f # TUBE: " looping on 5..." # TUBE: " sub 5 4" # TUBE: Variable # 5 ; Value = 00000000 # TUBE: "Exited loop 1" # TUBE: " " # TUBE: "Entering loop on variable 4..." # TUBE: " looping on 4 ..." # TUBE: " sub 4 #5" # TUBE: Variable # 4 ; Value = 0000000a # TUBE: " looping on 4 ..." # TUBE: " sub 4 #5" # TUBE: Variable # 4 ; Value = 00000005 # TUBE: " looping on 4 ..." # TUBE: " sub 4 #5" # TUBE: Variable # 4 ; Value = 00000000 # TUBE: "Exited loop 2" # TUBE: " " # TUBE: "** TEST PASSED OK **" # TUBE: Found end of SingleWire command file, ending simulation # TUBE: Test Finished
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