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Applies to: AHB
The AHB specification requires that all address phase timed control signals (other than HADDR and HTRANS) remain constant for the duration of a burst.
Although HLOCK is not an address phase timed signal, it does directly control the HMASTLOCK signal which is address phase timed.
Therefore HLOCK must remain high for the duration of a burst, and can only be deasserted such that the following HMASTLOCK signal changes after the final address phase of the burst.
Article last edited on: 2014-02-06 09:29:48
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