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Applies to: APB
The APB has been designed to implement as simple an interface as possible. Having this simple design makes it much easier to connect new APB peripherals and makes the analysis of the system performance easier to calculate.
Although many APB peripherals are slow devices, such as UARTs, they are normally accessed via control registers. Typically the driver software will first access a status register to determine that data is available and only then access the data register. Both of these accesses are possible without the addition of wait states and therefore the peripheral can easily be accessed as an APB device.
Peripherals which do require wait states can be designed as AHB slaves and in the rare case that a design does include a large number of these peripherals then a secondary stub AHB can be used to reduce the loading on the main system bus.
Article last edited on: 2014-02-06 07:38:53
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