|ARM Technical Support Knowledge Articles|
Applies to: PL181 Multimedia Card Interface V2
What is the derivation of the CmdPend signal? (i.e. what are the conditions that generate it?)
Pend mode functionality is implemented only in stream mode. In pend mode, the CPSM should be enabled before the DPSM. Software should not set the 'Pending' bit when the MMCI is in non-pend mode of operation.
There are two signals related to the pend mode. One is the Pending signal which is the command pend enable and the other is the PendPulse which is the trigger for the pend mode and comes from the data path block. Both these signals are fed into the command path block.
If the Pending bit is set in the command register, the CPSM enters the PEND state, in the state machine in the MMCI, and waits for a CmdPend signal from the data path subunit before it starts sending a command. When CmdPend is detected, the CPSM moves to the SEND state. This enables the data counter to trigger the stop command transmission.
Is CmdPend active while the data counter is 0 or only a transient when the counter transisitions 1->0. I.e. is a queued pending command only sent if it was queued before the 1->0 transition of the counter or would it be sent immediately if the counter was already 0 when the command was written into the command register?
The data counter has two functions, one is to stop data transfer when it reaches zero which is the end of the data condition.
The other function is to transfer a pending command, used to send the stop command for a STREAM data transfer.
When the data path state machine is in the RECEIVE state, in STREAM mode, it receives data while the data counter is not zero. When the counter reaches zero, the remaining data in the shift register is written in the data FIFO and the DPSM moves to the WAIT_R state.
When it is in the SEND state, in STREAM mode, the DPSM sends data to a card while the enable bit is HIGH and the data counter is not zero. It then moves to zero.
Does the command pend mechanism work if the data transfer is set to block mode, or is it only in stream mode?
As mentioned above Pend mode functionality is only implemented in stream mode. Thus you need to enable the data path for STREAM in the MMCI control register.
Why is Pending of a STOP command is not supported in block mode? Both block and stream modes both require a STOP command to be sent to terminate the data transfer (in block mode a read must be terminated with a STOP.)
Pending is generally used to send the STOP cmd only; although it can be used for other commands.
Stream read & write -> use pending.
Multiblock write -> after the last block (the data length reg) the MMCI will stop transmitting data to the card and assert an interrupt, and then the CPU can send the STOP cmd.
Multiblock read -> either wait for data transfer end and then send the STOP cmd (this will cause transfer of one/more additional blocks from the card, but the MMCI will ignore them) or the CPU should use the data block end flag in the status register to assert the interrupt (this can be used to track progress and then send the STOP cmd).
Alternatively the stream read can be used.
Article last edited on: 2008-09-09 15:47:25
Did you find this article helpful? Yes No
How can we improve this article?