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Applies to: PL08x DMAC (DM & SM)
Can the source and destination transfers be of differing widths?
Yes. The source and destination transfers can be of differing widths and can the same width or narrower than the physical bus width. The DMA controller packs or unpacks data as appropriate in its FIFO. The DMA controller uses HSIZE(1 or 2) to indicate the width of the transfer and if it fails to match the width expected by the peripheral an error response can be asserted by the peripheral using HRESP(1 or 2).
Is it possible to mix source and destination peripherals with different burst capability for one channel, ie single transfers to the source, and burst transfers to the destination?
Source and destination peripherals can be of different widths but if the destination width is smaller than the source peripheral then care must be taken, as data can be lost at the end of the data transfer. Not only that, the source and destination widths must be divisible by the number of transfers.
Are there any restrictions on the source and destination addresses?
Yes, the source and destination addresses must be aligned to the source and destination widths.
There are two fields, DestPeripheral and SrcPeripheral, in the DMACCxConfiguration register. What are they used for?
When configuring a DMAC channel for a transfer, you would have to program the DMAC channel with information about the source and destination of the transfer, which will include the address of the source and destination, the type of source and destination and so forth. The things to be programmed to configure the DMAC channel are those specified in the DMACCxConfiguration register as you have seen.
Now, in your system you may have a number of different sources and destinations, which could be either peripherals or memory. The DMAC can transfer data from:
Peripheral to Memory,
Memory to Peripheral,
Peripheral to Peripheral and
Memory to Memory.
What the DestPeripheral and SrcPeripheral fields specify are the destination peripheral and source peripheral, respectively, for the transfer related to a particular DMAC channel. There are 8 DMACCxConfiguration registers as there are 8 available channels on the DMAC. Thus each channel can have a different combination of source and destination peripherals.
You could have:
SrcPeripheral: Peripheral 1
DestPeripheral: Peripheral 2
SrcPeripheral: Peripheral 3
DestPeripheral: Peripheral 4
SrcPeripheral: Peripheral 3
DestPeripheral: (Memory) Don't Care
SrcPeripheral: (Memory) Don't Care
DestPeripheral: Peripheral 5
The last two examples show situations where the destination peripheral is a memory in the third example and the source peripheral is memory, in the fourth example. In this case, where, either source or destination is memory, then the Destperipheral/ SrcPeripheral fields in the DMACCxConfiguration register are ignored and thus the example shows Don't Care by them.
Article last edited on: 2008-09-09 15:47:25
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