ARM Technical Support Knowledge Articles

Section 2.5. Transfer Size

Applies to: PL08x DMAC (DM & SM)


So what exactly is meant by the Transfer Size?

The transfer size relates to the number of transfers to be performed, that is, for writes it refers to the Source Width transfers to perform when the DMA controller is the flow controller. For reads, transfer size refers to the number of transfers completed on the destination bus. If the DMA controller is NOT the flow controller then transfer size is not used. This means that writing to the DMACCx control register with the transfer size tells the DMA controller what source width transfers to be performed and reading from this register shows the number of destination width transfers have been completed.

Example 1:
32-bit Source / 8-bit Destination
Write TransferSize = 3 (words)
Then read TransferSize will increment from 0 to 12 (bytes) as the transfer progresses.

Example 2:
If SBSize (source burst size) = 0b111, 256 transfers,
SWidth = 0b010, 32-bit word and
Destination is memory
Then the DMA controller will transfer 256 32-bit words from the source peripheral to memory when the source peripheral's DMACBREQ signal goes active.

In the case of a peripheral being the flow controller, does the DMACCxControl Register TransferSize counter still count the number of elements transferred?

As the transfer size value is not used when the DMAC is not the flow controller; the transfersize counter is not active thus does not count the number of elements transferred. This counter is only applicable in the DMAC-Flow-Control-Mode.

Article last edited on: 2008-09-09 15:47:25

Rate this article

Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential