ARM Technical Support Knowledge Articles

Known issues with the ADS 1.2/RVCT 1.2 VFP Support Code

Applies to: ARM Developer Suite (ADS)

Answer

There are some known issues with the VFP Support Code as supplied with RVCT 1.2 or (for ADS 1.2 users) downloaded from the ADS 1.2 area of the Support Downloads pages.
These issues are fixed in RVDS2/RVCT2 .

  1. When VFP instructions bounce the support code does not clear the FP2V status bit in the VFP. This may cause subsequent bounce processing to fail. [DE 205809]

    In vfpsubarch.s, the _VFP_Collect_Trap_Description function, in the collect_op2 section after reading FPINST2:

    Replace:

       FMRX r3, FPINST2
    ...process r3...
    BIC r12, r12, #(1 << 31) ;; clear EX
    FMXR FPEXC, r12

    with:

       FMRX r3, FPINST2
    ...process r3...
    BIC r12, r12, #((1 << 31)|(1 << 28)) ;; clear EX and FP2V
    FMXR FPEXC, r12
  2. When VFP instructions bounce the value in register r0 is corrupted by the support code. This may cause programs to fail. [DE 202461]

    In the return from function TLUndef_Handler, at line 331 of fp_support/tlundef.s:

    ; Switch back to Undef mode, pop R0, and return
    ; by writing to the PC with a SPSR->CPSR transfer.
    MSR CPSR_c,R0
    LDR R0,[R13,#4]!
    MOVS PC,R14

    Replace:

                    LDR     R0,[R13,#4]!

    with:

                    LDR     R0,[R13],#4
  3. The VFP support code does not update the floating-point cumulative exception flags when processing a bounced VFP compare instruction. This is unlikely to be a problem in most code. Please contact us if you need more information about this. [DE 202459]

  4. Although ADS and RVCT 1.2 do not strictly support ARM11, the VFP support code can be used with VFP11 once the VFP coprocessor has been enabled in the Coprocessor Access Register. Please contact us if you need more information about this. [DE 194509]

Article last edited on: 2008-09-09 15:47:25

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