ARM Technical Support Knowledge Articles

RVI Target Interface levels and pull-up/pull-down resistors on the JTAG signals

Applies to: RealView ICE and Trace (RVI / RVT)

Answer

RVI is always powered from its power supply. VSupply is not used, so it can be left floating.

The JTAG interface voltage is the voltage on the VTRef pin clipped to 3.3V. VTRef has an internal 10Kohm pull-down resistor, so in order to interface the board with the right levels this pin should be connected directly to the power supply.

RVI detects that a target is present when VTREF is higher than a threshold value between 0.532V and 0.628V.

RVI drives the JTAG signals with analog switches (Pericom PI5C3126), so the output is connected to ground for a logic 0 and to the JTAG interface voltage for a logic 1.

TDI, TMS and TCK have 47ohm series resistors on the LVDS probe. All other outputs from the LVDS probe and the RV-ICE 20-way connector have 100ohm series resistors.

nSRST and nTRST are open-collector signals, so they are connected to ground for a logic 0 and left in high impedance for a logic 1. Both nSRST and nTRST are driven with BCW72 NPN transistors. nSRST has an internal 47Kohm pull-up and nTRST has a 4.7Kohm pull-up.

RVI inputs (TDO, RTCK and nSRST) are taken to high-impedance inputs of comparators. Each input is read as a logic 1 when it is higher than the voltage reference divided by 2.

Unlike Multi-ICE, RVI drives DBGRQ. This signal is always tied low and RVI uses the core's scan chain 2 to put the core in debug state.

The user should ensure that their board has appropriate pull-up and pull-down resistors on the JTAG signals:

  • TMS, TDI, TDO, nSRST and nTRST should have pull-ups
  • TCK should have a pull-down to enable hot swap and post-mortem debugging
  • RTCK should have a pull-down to fix a stable value on that signal when debugging a non-synthesizable core
  • DBGRQ should have a pull-down. This ensures that the core doesn't enter debug state in an uncontrolled way
  • DBGACK should have a pull-down, so the default value that the debugger sees is "core not in debug state"

The recommended value for pull-ups and pull-downs is 10Kohms, although the optimum value depends on the signal load: for example, pull-downs should be about 1Kohm when working with TTL logic.

Article last edited on: 2008-09-09 15:47:29

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